Who am I?

An IC Design Engineer with 6+ years of semiconductor industry experience, including 3 years working in Toshiba Japan, 2 years working in Toshiba Vietnam, 1 year working in Quest Global Vietnam, and also 2 years researching in an IC design laboratory.

I graduated with a Bachelor’s degree in Electronics and Telecommunications from Vietnam National University of Engineering and Technology (VNU-UET) in 2018. During my undergraduate studies under the supervision of Professor Xuan-Tu Tran at the VNU Key Laboratory for Smart Integrated Systems (SISLAB-VNU), I had research experience and contributed two international conference papers. Before graduation, I led my team to win a 1st Runner-up Award at the LSI Design Contest 2018 – a student design contest in Okinawa, Japan.

After presenting our contribution to the contest in Japan, I had opportunity to join Toshiba Corporation as an ASIC Design Engineer. After 6 months of trainee experience at the Association for Overseas Technical Cooperation and Sustainable Partnerships (AOTS) in Tokyo, I had 2.5 years of working experience at Toshiba Electronic Devices & Storage Corporation (TDSC) in Yokohama, Japan.

I have solid knowledge about ASIC design flow from architecture, RTL design, physical design, verification, and timing signoff. My current area is IC design for testing process (DFT – Design for Testability) which ensures the highest chip reliability. I am proficient in the DFT implementation process, and experienced from Test specification creation to DFT insertion and validation at pre-silicon and post-silicon.

After 5 years working at Toshiba Corporation (3 years in Japan and 2 years in Vietnam), I have joined Quest Global Vietnam (former name is Synapse Design Inc.) in the role of DFT Lead Engineer. Currently, I am working with customers as a project leader and customer interface. I am familiar with global working environments from multiple projects that worked with multi-functional global teams from Japan, India, Malaysia, America.

Besides, I am highly passionate about cutting-edge technologies, knowledge sharing, and blog writing. During my spare time, I have built a small team for a non-profit IC design project. We are building an IC design platform that includes implementation flow, teaching documents, technique sharing, etc., using open-source EDA implementation tools (OpenLane, SKY130 PDK). Our objective is to create a fundamental environment for anyone interested in IC design so they can learn and be able to build a chip by themselves.

+ Professional connect: linkedin.com/in/yoloh3
+ Our OpenIC project: series of IC design
+ Where I am chilling: github.com/yoloh3
+ Wanna be a part of my life: fb.com/yoloh3